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max5823/max5824/max5825 8???8/10/12 ?/??(dac)3ppm/ c 2.048v2.500v4.096v??max5823/max5824/ max58252.7v5.5v?? (6mw)?????? ???100k (?)? max5823/max5824/max5825i 2 c?2??? ??400khz?1dac ??250 a???? 0.5mv (?) ???max5823/max5824/max5825 m/ z ???dac??? ?????????? ??????max5823/max5824/ max5825load??dac? (ldac)?? max5823/max5824/max5825????? ?i/o????? ?( clr )?codedac? ???dac?????max5823/ max5824/max582520tssop??? 20wlp? - 40 c + 125 c?? ? ???? ? ??? ???? ??? ?? s ??dac ? 12? ? 1 lsb inl? ? ? ? ?dac?? s ????? ? 2.048v2.500v4.096v s ? ? ??? ? 4.5s? ? ?2k? s ?6.5mm 4.4mm 20tssop? 2.5mm 2.3mm 20wlp? s 2.7v5.5v? s 1.8v5.5v v ddio ? s 400khz i 2 c2? s ???y??dac? s ldacclr ?dac s ??? ? 1ki100k ? ?? ?? 19-6185; rev 0; 2/12 ??????????????? ?????maxim?10800 852 1249 ()10800 152 1249 () maxim?china.maximintegrated.com addr0 sda scl out0 buffer por watchdog timer v dd gnd dac control logic power-down ref out1 out2 out3 out4 out5 out6 out7 v ddio addr1 clr ldac irq m/z i 2 c serial interface 1ki 100ki code load clear/ reset (gate/ clear / reset) code register dac latch 8- /1 0- / 12-bit dac 1 of 8 dac channels internal reference/ external buffer max5823 max5824 max5825 ???????china.maximintegrated.com/max5823.related max5823/max5824/max5825 ?8?8/10/12 dac??i 2 c?
maxim integrated 2 v dd , v ddio to gnd ................................................ -0.3v to +6v out_, ref to gnd ....0.3v to the lower of (v dd + 0.3v) and +6v scl, sda, irq, m/z, ldac, clr to gnd ............. -0.3v to +6v addr_ to gnd ............................................ -0.3v to the lower of (v ddio + 0.3v) and +6v continuous power dissipation (t a = +70nc) tssop (derate at 13.6mw/nc above 70nc) .............. 1084mw wlp (derate at 21.3mw/nc above 70nc) .................. 1700mw maximum continuous current into any pin .................... q50ma operating temperature .................................... -40nc to +125nc storage temperature ....................................... -65nc to +150nc lead temperature (tssop only)(soldering, 10s) ........... +300nc soldering temperature (reflow) .................................... +260nc tssop junction-to-ambient thermal resistance ( ja ) ...... 73.8nc/w junction-to-case thermal resistance ( jc ) .............. 20nc/w wlp junction-to-ambient thermal resistance ( ja ) (note 2) ................................................................... 47nc/w absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to china.maximintegrated.com/thermal-tutorial. note 2: visit china.maximintegrated.com/app-notes/index.mvp/id/1891 for information about the thermal performance of wlp packaging. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) electrical characteristics (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) parameter symbol conditions min typ max units dc performance (note 4) resolution and monotonicity n max5823 8 bits max5824 10 max5825 12 integral nonlinearity (note 5) inl max5823 -0.25 q0.05 +0.25 lsb max5824 -0.5 q0.2 +0.5 max5825 -1 q0.5 +1 differential nonlinearity (note 5) dnl max5823 -0.25 q0.05 +0.25 lsb max5824 -0.5 q0.1 +0.5 max5825 -1 q0.2 +1 offset error (note 6) oe -5 q0.5 +5 mv offset error drift q10 fv/nc gain error (note 6) ge -1.0 q0.1 +1.0 %fs gain temperature coefficient with respect to v ref q3.0 ppm of fs/nc zero-scale error 0 +10 mv full-scale error with respect to v ref -0.5 +0.5 %fs ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 3 electrical characteristics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) parameter symbol conditions min typ max units dac output characteristics output voltage range (note 7) no load 0 v dd v 2ki load to gnd 0 v dd - 0.2 2ki load to v dd 0.2 v dd load regulation v out = v fs /2 v dd = 3v q10%, |i out | p 5ma 300 fv/ma v dd = 5v q10%, |i out | p 10ma 300 dc output impedance v out = v fs /2 v dd = 3v q10%, |i out | p 5ma 0.3 i v dd = 5v q10%, |i out | p 10ma 0.3 maximum capacitive load handling c l 500 pf resistive load handling r l 2 ki short-circuit output current v dd = 5.5v sourcing (output shorted to gnd) 30 ma sinking (output shorted to v dd ) 50 dc power-supply rejection v dd = 3v q10% or 5v q10% 100 fv/v dynamic performance voltage-output slew rate sr positive and negative 1.0 v/fs voltage-output settling time ? scale to ? scale, to p 1 lsb, max5823 2.2 fs ? scale to ? scale, to p 1 lsb, max5824 2.6 ? scale to ? scale, to p 1 lsb, max5825 4.5 dac glitch impulse major code transition (code x7ff to x800) 2 nv*s channel-to-channel feedthrough (note 8) internal reference 3.3 nv*s external reference 4.07 digital feedthrough midscale code, all digital inputs from 0v to v ddio 0.2 nv*s power-up time startup calibration time (note 9) 200 fs from power-down 50 fs ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 4 electrical characteristics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) parameter symbol conditions min typ max units output voltage-noise density (dac output at midscale) external reference f = 1khz 90 nv/hz f = 10khz 82 2.048v internal reference f = 1khz 112 f = 10khz 102 2.5v internal reference f = 1khz 125 f = 10khz 110 4.096v internal reference f = 1khz 160 f = 10khz 145 integrated output noise (dac output at midscale) external reference f = 0.1hz to 10hz 12 fv p-p f = 0.1hz to 10khz 76 f = 0.1hz to 300khz 385 2.048v internal reference f = 0.1hz to 10hz 14 f = 0.1hz to 10khz 91 f = 0.1hz to 300khz 450 2.5v internal reference f = 0.1hz to 10hz 15 f = 0.1hz to 10khz 99 f = 0.1hz to 300khz 470 4.096v internal reference f = 0.1hz to 10hz 16 f = 0.1hz to 10khz 124 f = 0.1hz to 300khz 490 output voltage-noise density (dac output at full scale) external reference f = 1khz 114 nv/hz f = 10khz 99 2.048v internal reference f = 1khz 175 f = 10khz 153 2.5v internal reference f = 1khz 200 f = 10khz 174 4.096v internal reference f = 1khz 295 f = 10khz 255 integrated output noise (dac output at full scale) external reference f = 0.1hz to 10hz 13 fv p-p f = 0.1hz to 10khz 94 f = 0.1hz to 300khz 540 2.048v internal reference f = 0.1hz to 10hz 19 f = 0.1hz to 10khz 143 f = 0.1hz to 300khz 685 2.5v internal reference f = 0.1hz to 10hz 21 f = 0.1hz to 10khz 159 f = 0.1hz to 300khz 705 4.096v internal reference f = 0.1hz to 10hz 26 f = 0.1hz to 10khz 213 f = 0.1hz to 300khz 750 ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 5 electrical characteristics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) parameter symbol conditions min typ max units reference input reference input range v ref 1.24 v dd v reference input current i ref v ref = v dd = 5.5v 55 74 fa reference input impedance r ref 75 100 ki reference output reference output voltage v ref v ref = 2.048v, t a = +25nc 2.043 2.048 2.053 v v ref = 2.5v, t a = +25nc 2.494 2.5 2.506 v ref = 4.096v, t a = +25nc 4.086 4.096 4.106 reference temperature coefficient (note 10) max5825a q3 q10 ppm/nc max5823/max5824/max5825b q10 q25 reference drive capacity external load 25 ki reference capacitive load handling 200 pf reference load regulation i source = 0 to 500fa 2 mv/ma reference line regulation 0.05 mv/v power requirements supply voltage v dd v ref = 4.096v 4.5 5.5 v all other options 2.7 5.5 i/o supply voltage v ddio 1.8 5.5 v supply current (note 11) i dd internal reference v ref = 2.048v 1.6 2 ma v ref = 2.5v 1.7 2.1 v ref = 4.096v 2.0 2.5 external reference v ref = 3v 1.6 2.0 v ref = 5v 1.9 2.5 power-down mode supply current i pd all dacs off, internal reference on 140 fa all dacs off, internal reference off, t a = -40nc to +85nc 0.7 2 all dacs off, internal reference off, t a = +125nc 2 4 digital supply current i ddio static logic inputs, all outputs unloaded 1 fa digital input characteristics (scl, sda, addr0, addr1, ldac, clr, m/z) input high voltage (note 11) v ih (all inputs except m/z) 2.2v < v ddio < 5.5v 0.7 x v ddio v 1.8v < v ddio < 2.2v 0.8 x v ddio v 2.7v < v dd < 5.5v (for m/z) 0.7 x v dd ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 6 electrical characteristics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) parameter symbol conditions min typ max units input low voltage (note 11) v il (all inputs except m/z) 2.2v < v ddio < 5.5v 0.3 x v ddio v 1.8v < v ddio < 2.2v 0.2 x v ddio v 2.7v < v dd < 5.5v (for m/z) 0.3 x v dd input leakage current i in v in = 0v or v ddio , all inputs except m/z (note 11) q0.1 q1 fa v in = 0v or v dd , for m/z (note 11) input capacitance (note 10) c in 10 pf hysteresis voltage v h 0.15 v addr_ pullup/pulldown strength r pu , r pd (note 12) 30 50 90 ki digital output (sda, irq) output low voltage v ol i sink = 3ma 0.2 v output inactive leakage i off irq only, see i in for sda q0.1 q1 fa output inactive capacitance c off irq only, see c in for sda 10 pf watchdog timer characteristics watchdog timer period t wdosc v dd = 3v, t a = +25c 0.95 1 1.05 ms watchdog timer period supply drift v dd = 2.7v to 5.5v, t a = +25c 0.6 %/v watchdog timer period temperature drift v dd = 3v 0.0375 %/c i 2 c timing characteristics (scl, sda, ldac, clr) scl clock frequency f scl 400 khz bus free time between a stop and a start condition t buf 1.3 fs hold time repeated for a start condition t hd;sta 0.6 fs scl pulse width low t low 1.3 fs scl pulse width high t high 0.6 fs setup time for repeated start condition t su;sta 0.6 fs data hold time t hd;dat 0 900 ns data setup time t su;dat 100 ns sda and scl receiving rise time t r 20 + c b /10 300 ns ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 7 ?1. i 2 c?? electrical characteristics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) note 3: limits are 100% production tested at t a = +25nc and/or t a = +125nc. limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. typical values are at t a = +25nc and are not guaranteed. note 4: dc performance is tested without load, v ref = v dd . note 5: linearity is tested with unloaded outputs to within 20mv of gnd and v dd . note 6: gain and offset calculated from measurements made at code 30 and 4065 with v ref = v dd . note 7: subject to zero- and full-scale error limits and v ref settings. note 8: measured with all other dac outputs at midscale with one channel transitioning 0 to full scale. note 9: on power-up, the device initiates an internal 200s (typ) calibration sequence. all commands issued during this time will be ignored. note 10: guaranteed by design. note 11: all channels active at v fs , unloaded. static logic inputs with v il = v gnd and v ih = v ddio for all inputs . note 12: unconnected conditions on the addr_ inputs are sensed through a resistive pullup and pulldown operation; for proper operation, addr_ inputs must be connected to v ddio , gnd, or left unconnected with minimal capacitance. parameter symbol conditions min typ max units sda and scl receiving fall time t f 20 + c b /10 300 ns sda transmitting fall time t f 20 + c b /10 250 ns setup time for stop condition t su;sto 0.6 fs bus capacitance allowed c b v dd = 2.7v to 5.5v 10 400 pf pulse width of suppressed spike t sp 50 ns clr removal time prior to a recognized start t clrsta 100 ns clr pulse width low t clpw 20 ns ldac pulse width low t ldpw 20 ns ldac fall to sclk rise hold t ldh 400 ns t su;sto t r t sp t hd;sta t su;sta t f t high t hd;dat t low t clpw t clrsta t ld h t ldpw t hd;sta t f s s s r p sd a sc l cl r ld ac t su;dat t f t buf ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 8 ? (max5825, 12-bit performance, t a = +25c, unless otherwise noted.) inl vs. code max5823 toc01 code (lsb) inl (lsb) 3584 3072 2048 2560 1024 1536 512 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 v dd = v ref = 3v no load inl vs. code max5823 toc02 code (lsb) inl (lsb) 3584 3072 2048 2560 1024 1536 512 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 v dd = v ref = 5v no load dnl vs. code max5823 toc03 code (lsb) dnl (lsb) 3584 3072 2048 2560 1024 1536 512 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 v dd = v ref = 3v no load dnl vs. code max5823 toc04 code (lsb) dnl (lsb) 3584 3072 2048 2560 1024 1536 512 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 v dd = v ref = 5v no load inl and dnl vs. supply voltage max5823 toc05 supply voltage (v) error (lsb) 5.1 4.7 3.9 4.3 3.5 3.1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 max inl v dd = v ref 1.0 -1.0 2.7 5.5 max dnl min dnl min inl inl and dnl vs. temperature max5823 toc06 temperature (c) 110 95 65 80 -10 5 20 35 50 -25 -40 125 error (lsb) -0.8 -0.6 -0.4 -0.2 0.2 0 0.4 0.6 0.8 1.0 -1.0 max inl v dd = v ref = 3v max dnl min dnl min inl offset and zero-scale error vs. supply voltage max5823 toc07 supply voltage (v) error (mv) 5.1 4.7 3.9 4.3 3.5 3.1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 2.7 5.5 zero-scale error offset error v ref = 2.5v (external) no load offset and zero-scale error vs. temperature max5823 toc08 temperature (c) 110 95 65 80 -10 5 20 35 50 -25 -40 125 error (mv) -0.8 -0.6 -0.4 -0.2 0.2 0 0.4 0.6 0.8 1.0 -1.0 v ref = 2.5v (external) no load offset error (v dd = 5v) offset error (v dd = 3v) zero-scale error full-scale error and gain error vs. supply voltage max5823 toc09 supply voltage (v) error (%fs) 5.1 4.7 3.9 4.3 3.5 3.1 -0.016 -0.012 -0.008 -0.004 0 0.004 0.008 0.012 0.016 v ref = 2.5v (external) no load 0.020 -0.020 2.7 5.5 full-scale error gain error ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 9 ?() (max5825, 12-bit performance, t a = +25c, unless otherwise noted.) full-scale error and gain error vs. temperature max5823 toc10 temperature (c) 110 95 65 80 -10 5 20 35 50 -25 -40 125 error (%fsr) -0.05 0 0.05 0.10 -0.10 v ref = 2.5v (external) no load gain error (v dd = 3v) gain error (v dd = 5v) full-scale error supply current vs. temperature max5823 toc11 temperature (c) 110 95 65 80 -10 5 20 35 50 -25 -40 125 supply current (ma) 1.2 1.4 1.6 2.0 1.8 1.0 v ref (external) = v dd = 5v v dd = v ddio v dac_ = full scale all dacs enabled no load v ref (internal) = 4.096v, v dd = 5v v ref (internal) = 2.5v, v dd = 5v v ref (internal) = 2.048v, v dd = 5v v ref (external) = v dd = 3v supply current vs. supply voltage max5823 toc12 supply voltage (v) supply current (ma) 5.1 4.7 3.9 4.3 3.5 3.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 2.7 5.5 v dd = v ddio v dac_ = full scal e all dacs enabled no load v ref (internal) = 4.096v v ref (internal) = 2.5v v ref (internal) = 2.048v v ref = 2.5v (external) power-down mode supply current vs. supply voltage max5823 toc13 supply voltage (v) power-down supply current (a) 5.1 4.7 4.3 3.9 3.5 3.1 0.4 0.8 1.2 1.6 2.0 0 2.7 5.5 t a = -40c t a = +25c t a = +85c t a = +125c v dd = v ddio v ref = 2.5v (external) power-down mode with hi-z no load i vdd vs. code max5823 toc14 code (lsb) supply current (ma) 3584 3072 2560 2048 1536 1024 0.4 0.8 1.2 1.6 2.0 0 512 0 4096 v dd = 5v, v ref = 4.096v v dd = v ref = 3v v dd = 5v, v ref = 2.048v v dd = 5v, v ref = 2.5v v dd = v ref = 5v no load i ref (external) vs. code max5823 toc15 code (lsb) reference current ( a) 3584 3072 2560 2048 1536 1024 10 20 30 40 50 60 0 512 0 4096 v dd = v ref no load v ref = 5v v ref = 3v max5823 toc16 trigger pulse 5v/div v out 0.5v/div zoomed v out 1 lsb/div 4s/div settling to 1 lsb (v dd = v ref = 5v, r l = 2ki , c l = 200pf) 3.75s 1/4 scale to 3/4 scal e max5823 toc17 trigger pulse 5v/div v out 0.5v/div zoomed v out 1 lsb/div 4s/div settling to 1 lsb (v dd = v ref = 5v, r l = 2ki , c l = 200pf) 3/4 scale to 1/4 scal e 4.3s ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 10 ?() (max5825, 12-bit performance, t a = +25c, unless otherwise noted.) max5823 toc18 trigger pulse 5v/div 1 lsb change (midcode transition 0x800 to 0x7ff) glitch impulse = 2nv*s zoomed v out 1.25mv/div 2s/div major code transition glitch energy (v dd = v ref = 5v, r l = 2ki , c l = 200pf) major code transition glitch energy (v dd = v ref = 5v, r l = 2ki , c l = 200pf) max5823 toc19 2s/div trigger pulse 5v/div zoomed v out 1.25mv/div 1 lsb change (midcode transition 0x7ff to 0x800) glitch impulse = 2nv*s v out vs. time transient exiting power-down max5823 toc20 dac output 500mv/div 10s / div v scl 5v/div 0v 36th edge 0v v dd = 5v, v ref = 2.5v external power-on reset to 0v max5823 toc21 v out 2v/div 20s / div v dd 2v/div 0v 0v v dd = v ref = 5v 10ki load to v dd channel-to-channel feedthrough (v dd = v ref = 5v, t a = +25n c, no load) max5823 toc22 4s / div v dac0 5v/div no load v dac4 0.585 lsb/div no load transitioning dac: 0 to full scale static dac: midscale analog crosstalk = 3.3nv*s channel-to-channel feedthrough (v dd = 5v, v ref = 4.096v, t a = +25n c, no load) max5823 toc23 4s / div v dac0 5v/div no load v dac4 0.585 lsb/div no load transitioning dac: 0 to full scale static dac: midscale analog crosstalk = 2.6nv*s ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 11 ?() (max5825, 12-bit performance, t a = +25c, unless otherwise noted.) channel-to-channel feedthrough (v dd = v ref = 5v, t a = +25n c, r l = 2ki , c l = 200pf) max5823 toc24 4s / div v dac0 5v/div loaded v dac4 0.585 lsb/div no load transitioning dac: 0 to full scale static dac: midscale analog crosstalk = 4.07nv*s max5813 toc25 v dac0 5v/div loaded v dac4 0.585 lsb/div no load 4s/div channel-to-channel feedthrough (v dd = 5v, v ref = 4.096v (internal), t a = +25n c, r l = 2ki , c l = 200pf) transitioning dac: 0 to full scale static dac: midscale analog crosstalk = 3.3nv*s max5823 toc26 20ns/div digital feedthrough (v dd = v ref = 5v, r l = 10ki ) v dac_ 2mv/div digital crosstalk = 0.2nv*s static dac midscale output load regulation max5823 toc27 i out (ma) dv out (mv) 50 40 20 30 -10 0 10 -20 -8 -6 -4 -2 0 2 4 6 8 10 -10 -30 60 v dd = v ref v dd = 5v v dd = 3v output current limiting max5823 toc28 i out (ma) d v out (mv) 60 50 30 40 -10 0 10 20 -20 -400 -300 -200 -100 0 100 200 300 400 500 -500 -30 70 v dd = v ref v dd = 5v v dd = 3v headroom at rails vs. output current max5823 toc29 i out (ma) v out (v) 9 8 6 7 2 3 4 5 1 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 0 01 0 v dd = 5v, sourcing v dd = 3v, sourcing v dd = 3v and 5v sinking v dd = v ref dac = full scale noise-voltage density vs. frequency (dac at midscale) max5823 toc30 frequency (hz) noise-voltage density (nv/ hz) 10k 1k 50 100 150 200 250 300 350 0 100 100k v dd = 5v, v ref = 2.5v internal v dd = 5v, v ref = 2.048v internal v dd = 5v, v ref = 3.5v (external) v dd = 5v, v ref = 4.096v internal ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 12 ?() (max5825, 12-bit performance, t a = +25c, unless otherwise noted.) 0.1hz to 10hz output noise, external reference (v dd = 5v, v ref = 4.5v) max5823 toc31 2v/div midscale unloaded v p-p = 12v 4s /div 0.1hz to 10hz output noise, internal reference (v dd = 5v, v ref = 2.048v) max5823 toc32 2v/div midscale unloaded v p-p = 13v 4s /div 0.1hz to 10hz output noise, internal reference (v dd = 5v, v ref = 2.5v) max5823 toc33 2v/div midscale unloaded v p-p = 15v 4s /div 0.1hz to 10hz output noise, internal reference (v dd = 5v, v ref = 4.096v) max5823 toc34 2v/div midscale unloaded v p-p = 16v 4s /div v ref drift vs. temperature max5823 toc35 temperature drift (ppm / c) percent of population (%) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 5 10 15 20 25 30 0 0 v dd = 2.7v v ref = 2.5v (internal) box method reference load regulation max5823 toc36 reference output current (a) dv ref (mv) 450 400 350 300 250 200 150 100 50 -0.8 -0.6 -0.4 -0.2 0 -1.0 0 500 v ref = 2.048v, 2.5v, and 4.096v v dd = 5v internal reference supply current vs. input logic voltage (v dd = 3v) max5823 toc37 input logic voltage (v) supply current (a) 4 3 2 1 200 400 600 800 1000 1200 1400 1600 1800 2000 0 05 v ddio = 5v v ddio = 3v v ddio = 1.8v sda , scl, clr, and ldac swept from 0v to v ddio and v ddio to 0v ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 13 ?() (max5825, 12-bit performance, t a = +25c, unless otherwise noted.) watchdog timer period histogram max5823 toc38 frequency (hz) percent of population (%) 4 6 8 10 12 14 0 2 990 992 994 996 998 1000 1002 1004 1006 1008 1010 1012 v dd = 3v watchdog timer frequency vs. supply voltage max5823 toc39 supply voltage (v) watchdog timer frequency (hz) 5.1 4.7 4.3 3.9 3.5 3.1 980 985 990 995 1000 1005 975 2.7 5.5 watchdog timer frequency vs. temperature max5823 toc40 temperature (c) watchdog timer frequency (hz) 110 95 65 80 -10 5 20 35 50 -25 920 930 940 950 960 970 980 990 1000 1010 910 -40 125 v dd = 3v ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 14 ? tssop wlp 1 d3 ref ??/ 2 d2 dac0 dac?0? 3 d1 dac1 dac?1? 4 c1 dac2 dac?2? 5 c2 dac3 dac?3? 6 b2 dac4 dac?4? 7 b1 dac5 dac?5? 8 a1 dac6 dac?6? 9 a2 dac7 dac?7? 10 b3 v dd ??? 11 a3 v ddio ??? 12 a4 addr1 i 2 c??1 13 a5 addr0 i 2 c??0 14 b5 scl i 2 c?? 15 b4 sda i 2 c/ 16 c5 irq ???irq ?????? 17 c4 clr ???dac? 18 d5 ldac ???dac?? 19 d4 gnd ? 20 c3 m/z dac???m/ zgnd???m/zv dd ??? 20 19 18 17 16 15 14 1 2 3 4 5 6 7 m/z gnd ldac clr dac2 dac1 dac0 ref top view max5823 max5824 max5825 irq sda scl dac5 dac4 dac3 13 12 11 8 9 10 addr0 addr1 v ddio v dd dac7 dac6 tssop + top view clr dac2 sda dac5 addr1 dac6 max5823/max5824/max5825 + 1 2 34 a dac3 m/z dac4 v dd dac7 v ddio b c wlp d irq scl addr0 5 gnd dac1 dac0 ref ldac ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 15 ?? max5823/max5824/max5825?8???8/10/12 ?dac2.7v5.5v??? ??????????? ??100k ? ??????2.048v 2.500v4.096v 400khz i 2 c??? max5823/max5824/max5825/? ?codedac?dac??(m/ z = 0)?(m/ z = 1)?y(por)?? clr ?dac?????? ??? ldac ???? ?dacmax5823/max5824/max5825? ???????irq ?? dac(out_) max5823/max5824/max5825dac dac??? 1v/ s (?)2k 500pf?? ???(v dd )? ? ?gndv dd ???gnd ??2k ??gndv dd 200mvv dd ??2k ? ?gnd 200mvv dd dac?? out ref n d vv 2 = ?d = ?dac???v ref = ?? n = ?? ??? ??dac???? ??????? ?dac??? ?dac??code??dac ( ??? )code?? dac??dac?code code_load?code?dac? ??dac?code_load? ???dac?load ldac ??code????dac? ?????codedac?? dac????????? codeload??? ?return???dac? ??return?codedac?? ???(default?)? ? ? clr sw_clear ? codedac ???????sw_reset codedac??m/ z ??? ??sw_gate?dac? default?codedac???? ??????? ?? max5823/max5824/max5825????? ?2.048v2.500v4.096v??? ref?????( ? ) 25k ?? ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 16 ?2. i 2 c startrepeated startstop ?? ??100k ??? + 1.24v v dd ?????refgnd?? ??max5823/max5824/max5825??? ??????????? china.maximintegrated.com/products/references m/z ?m/ z ?max5823/max5824/max5825? ?dac???y?codedac? (m/ z = gnd)?(m/ z = v dd )m/ z v dd (v ddio )?????m/ z m/ z?v dd gnd ?dac (ldac) max5823/max5824/max5825??? ldac ??dac?????? ??? ldac v ddio ?? ldac ??? ldac ????code ?dac ldac ????? dac???code??dac? dacconfig?? dacldac (clr) max5823/max5824/max5825???clr ??????dac?? default? ? clr ????code dac????dac? i 2 c(dac??)? i 2 c? clr ???t clrsta ?? config?dac ? max5823/max5824/max5825 ? ???i/o??????? ????? ??????dac? default??????? ?????? ???config? ??dac?????? ???wdog_config? ?????m?????? ? irq max5823/max5824/max5825??? ????? scl sda ss rp valid start, repeated start, and stop pulses ps p sp p s invalid start/s top pulse pairings-all will be recognized as starts ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 17 ???(v ddio ) max5823/max5824/max5825??(1.8v 5.5v)??(v ddio )v ddio i/o? i 2 c? max5823/max5824/max5825 i 2 c/smbus tm 2????(sda)?? (scl)??400khz?sdascl? max5823/max5824/max5825??? ?1 ??2??????scl ???????? ?max5823/max5824/max5825 ???start (s)repeated start (sr) stop (p) max5823/max5824/ max5825???8??^ max5823/max5824/max5825??? ???????9scl ^max5823/max5824/max5825?sda? scl?????? ??????startrepeated start?stopsda ??sda???4.7k scl ????scl ?scl??k??4.7k sdascl?????b max5823/max5824/max5825? ?????????3^ max5823/max5824/max5825? v ddio ? ???5.5v??v ddio ? ?????max5823/max5824/ max5825?^??? ???code??dac ?dac?? ldac ??? ???dac?load i 2 c startstop ??sdascl??????? start??startscl?? ??sda????stopscl??? ?sda??( ?2 )start?? max5823/max5824/max5825??? stop????repeated startstop? i 2 c?stoprepeated start max5823/max5824/max5825???? stopstopstart?? ?^?stop??? ????stop ????????( ??i 2 c??)???? ??2 1. i 2 c??lsb smbusintel corp.?? addr1 addr0 a3 a2 a1 a0 v ddio v ddio 1 1 1 1 v ddio n.c. 1 1 1 0 v ddio gnd 1 1 0 0 n.c. v dd 1 0 1 1 n.c. n.c. 1 0 1 0 n.c. gnd 1 0 0 0 gnd v ddio 0 0 1 1 gnd n.c. 0 0 1 0 gnd gnd 0 0 0 0 ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 18 ?3. i 2 c? ?4. i 2 c? i 2 c?? ???7(msb)?r/ w ?4 ?0014lsbaddr1 addr0? 1 ?r/ w 1?max5823/ max5824/max5825???r/ w 0? max5823/max5824/max5825????? start?max5823/max5824/max5825 ???? ???max5823/max5824/max5825? addr_ (n.c.)? ? addr_ ??addr_???(? addr_???????) i 2 c?? ???i 2 c??max5823/max5824/ max5825????????? ?max5823/max5824/max5825?? ??00101000?????( ?r/w = 0) i 2 c? ? ? ? ? (ack) 9 ? max5823/ max5824/max5825?????? ?3 ???????max5823/ max5824/max5825?9?? sdaack????? ??????? ????? ???9??sda? max5823/max5824/max5825???? ????????? max5823/max5824/max5825??? ???stop i 2 c??? ????????? ???????? ?????2??? ?????? ?ack?????? ??dac? 1 scl start condition sda 29 clock pulse for acknowledgment acknowledge not acknowledge scl a 20 19 18 17 a 16 15 14 13 12 11 10 9a 8 start sda write address byte #1: i 2 c slave address write command byte #2: command byte (b[23:16]) write data byte #3: data high byte (b[15:8]) write data byte #4: data low byte (b[7:0]) 21 22 23 stop 7 6 5 4 3 2 1 a 0 ack. generated by max5823/max5824/ max5825 command executed a3 a2 a1 a0 w 1 0 0 a ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 19 ?5. ?(?i 2 c) ?6. ?i 2 c? i 2 c ???????? max5823/max5824/max5825???? startrepeated startstop? ??8????(ack) ?4 ?5 ????max5823/max5824/ max5825??r/w = 0???? ???()???? ??????(?4?5? 24)???i 2 c?? ???? ????max5823/max5824/max5825? ?? ??i 2 c? ? ? startrepeated start stop??8??? ?6 ? ? max5823/max5824/ max5825??r/w = 0???? ???repeated start ?(?r/ w = 1?)???? ?sclmax5823/max5824/max5825 ?sda??2????? ??stop???? ?max5823/max5824/max58251 ??wdog(b[23:20] = 0001)????? ???????? scl a w 20 19 18 17 a 16 15 14 13 12 11 10 9a 8 start sda write address byte #1: i 2 c slave address write command1 byte #2: command1 byte (b[23:16]) write data1 byte #3: data1 high byte (b[15:8]) 21 0 0 1 a3 a2 a1 a0 22 23 stop 7 6 5 4 3 2 1a 0 write data1 byte #4: data1 low byte (b[7:0]) 20 19 18 17 a 16 15 14 13 12 11 10 9a 8 21 22 23 7 6 5 4 3 2 1a 0 additional command and data pairs (3 byte blocks) command1 executed commandn executed byte #5: commandn byte (b[23:16]) byte #6: datan high byt e (b[15:8]) byte #7: datan low byt e (b[7:0]) ack. generated by max5823/max5824/ max5825 a read data byte #4: data1 high byte (b[15:8]) read data byte #5: data1 low byte (b[15:8]) repeated start read address byte #3: i 2 c slave address write address byte #1: i 2 c slave address write command1 byte #2: command1 byte ack. generated by max5823/max5824/ max5825 ack. generated by i 2 c master a a start stop scl sda 00 1a 3a 2a 1a 0w aa 0 0n 0 01 a3 a2 a1 a0 ra d ddd dd dd dddddddd ~a a nn nnn ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 20 return(b[23:20] = 0111)???return ?dac??return ????dac???dac return0????dac ?return_all (b[23:16] = 11000011)? ?dac??return?? code (b[23:20] = 1000)? code ?dac??code? ???dac???dac code0????dac? code_all (b[23:16] = 11000000)??dac ?code?? ?load(b[23:20] = 1001, 1010, 1011)?? dac??dac? dac????dac??? dacdac0???? dac? load_allcode_all_load_all (b[23:16]??1100000111000010)??dac? load?? power (b[23:20] = 0100)? power ?dac????b[7:0]??1?dac??0 ?dac?(2) ??????????? ??????(wd:0 = 1 = ?)?(ref[2:0]) clr? (b[10:8] = 001)id (b[7:0])? 2? ??i 2 c? max5823/max5824/max5825?????i 2 c ????????1??? ???????? ????? ?? ??7 ??????(r/ w = 0)??????? stop/start?repeated start?? (r/ w = 1??)?max5823/max5824/ max5825??scl?max5823/ max5824/max5825?sda?? ???????? ??stop???? ?max5823/max5824/max58251 2. ?i 2 c? command byte (request) readback data high byte readback data low byte b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 1 x x x x wdog timeout selection[11:4] timeout selection[3:0] wdm wl[1:0] 0 0 1 0 0 x x x x 0 0 0 0 0 0 0 0 pw7 pw6 pw5 pw4 pw3 pw2 pw1 pw0 0 1 1 1 dac selection returnn[11:4] returnn[3:0] addressn[3:0] 1 0 0 0 dac selection coden[11:4] coden[3:0] addressn[3:0] 1 0 0 1 dac selection dacn[11:4] dacn[3:0] addressn[3:0] 1 0 1 0 dac selection dacn[11:4] dacn[3:0] addressn[3:0] 1 0 1 1 dac selection dacn[11:4] dacn[3:0] addressn[3:0] 1 1 0 0 0 0 0 0 code0[11:4] code0[3:0] address0[3:0] 1 1 0 0 0 0 0 1 dac0[11:4] dac0[3:0] address0[3:0] 1 1 0 0 0 0 1 0 dac0[11:4] dac0[3:0] address0[3:0] 1 1 0 0 0 0 1 1 return0[11:4] return0[03:0] address0[3:0] all other commands (max5825) wd ref[2:0] clr rev_id [2:0] (001) 1 0 0 0 0 0 0 0 all other commands (max5824) 1 0 1 0 0 0 0 0 all other commands (max5823) 1 0 0 1 0 0 0 0 ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 21 3. dac??? ?7. ??i 2 c? part b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 max5823 d7 d6 d5 d4 d3 d2 d1 d0 x x x x x x x x max5824 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x x x x x max5825 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x x x scl a w 20 19 18 17 a 16 15 14 13 12 11 10 9 a 8 sda 0 0 1 a3 a2 a1 a0 22 23 7 6 5 4 3 2 1 a 0 r ~a pointer updated (qualifies for combined read back) command executed (qualifies for interface read back) scl sda command executed (qualifies for interface read back) pointer updated (qualifies for combined read back) 21 a w2 01 91 81 7a 16 15 14 13 12 11 10 9a 8 00 1a 3a 2a 1a 02 2 23 76 54 32 1a 0 21 start stop write address byte #1: i 2 c slave address write command byte #2: command byte (b[23:16]) write data byte #3: data high byte (b[15:8]) write data byte #4: data low byte (b[7:0]) start stop write address byte #1: i 2 c slave address read command byte #2: command byte (b[23:16]) read data byte #3: data high byte (b[15:8]) read data byte #4: data low byte (b[7:0]) start repeated start write address byte #1: i 2 c slave address write command byte #2: command byte (b[23:16]) write data byte #3: data high byte (b[15:8]) write data byte #4: data low byte (b[7:0]) stop write address byte #1: i 2 c slave address read command byte #2: command byte (b[23:16]) read data byte #3: data high byte (b[15:8]) read data byte #4: data low byte (b[7:0]) ack. generated by max5823/max5824/max5825 ack. generated by i 2 c master a2 01 91 81 7a 16 15 14 13 12 11 10 9a 8 00 1a 3a 2a 1a 02 2 23 76 54 32 10 21 a r2 01 91 81 7a 16 15 14 13 12 11 10 9a 8 00 1a 3a 2a 1a 02 2 23 76 54 32 1~ a 0 21 a a ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 22 ?????pi 2 c ??max5823/max5824/max5825?? ?????????? ???4?????i 2 c ??????? ????? ??/?? ? i 2 c max5823/max5824/max5825i 2 c???? sclsda??sda??? ?ack^?8???i 2 c? i 2 c??? max5823/max5824/max5825?? ?? 4???? ?8. ?i 2 c?? c addr0 addr1 scl sda scl sda addr0 addr1 +5v scl sda max5823 max5824 max5825 max5823 max5824 max5825 ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 23 4. i 2 c command b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 description configuration and software commands wdog 0 0 0 1 x x x` x timeout selection[11:4] timeout selection[3:0] wd_mask safety level 00: low 01: med 10: high 11: max x updates watchdog settings and safety levels ref 0 0 1 0 0 ref pow- er 0 = dac 1 = on ref mode 00 = ext 01 = 2.5v 10 = 2.0v 11 = 4.1v x x x x x x x x x x x x x x x sets the reference operating mode. ref power (b18): 0 = internal reference is only powered if at least one dac is powered. 1 = internal reference is always powered. sw_gate_clr 0 0 1 1 0 0 0 0 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 removes any existing gate condition sw_gate_set 0 0 1 1 0 0 0 1 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 initiates a gate condition wd_refresh 0 0 1 1 0 0 1 0 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 refreshes the watchdog timer wd_reset 0 0 1 1 0 0 1 1 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 resets the watchdog timeout alarm status and refreshes the watchdog timer sw_clear 0 0 1 1 0 1 0 0 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 executes a software clear (all code and dac registers cleared to their default values) sw_reset 0 0 1 1 0 1 0 1 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 executes a software reset (all code, dac, and control registers returned to their power-on reset values) power 0 1 0 0 0 0 0 0 dac 7 dac 6 dac 5 dac 4 dac 3 dac 2 dac 1 dac 0 power mode 00 = normal 01 = pd 1kw 10 = pd 100kw 11 = pd hi-z x x x x x x sets the power mode of the selected dacs (dacs selected with a 1 in the corresponding dacn bit are updated, dacs with a 0 in the corresponding dacn bit are not impacted) config 0 1 0 1 0 0 0 0 dac 7 dac 6 dac 5 dac 4 dac 3 dac 2 dac 1 dac 0 wdog config- uration 00: dis 01: gate 10: clr 11: hold gate_enb ldac_enb clear_enb x x x configures selected dac watchdog, gate, load, and clear operations. dacs selected with a 1 in the corresponding dacn bit are updated, dacs with a 0 in the corresponding dacn bit are not impacted) ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 24 4. i 2 c() command b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 description default 0 1 1 0 0 0 0 0 dac 7 dac 6 dac 5 dac 4 dac 3 dac 2 dac 1 dac 0 default values: 000: m/z 001: zero 010: mid 011: full 100: return 101+: no effect sets the default code settings for selected dacs. note: dacs in return mode programmable return codes. (dacs selected with a 1 in the corresponding dacn bit are updated, dacs with a 0 in the corresponding dacn bit are not impacted) dac commands returnn 0 1 1 1 dac selection return register data[11:4] return register data[3:0] x x x x writes data to the selected return register(s) coden 1 0 0 0 dac selection code register data[11:4] code register data[3:0] x x x x writes data to the selected code register(s) loadn 1 0 0 1 dac selection x x x x x x x x x x x x x x x x transfers data from the selected code registers to the selected dac register(s) coden_ load_all 1 0 1 0 dac selection code register data[11:4] code register data[3:0] x x x x simultaneously writes data to the selected code register(s) while updating all dac registers coden_loadn 1 0 1 1 dac selection code register data[11:4] code register data[3:0] x x x x simultaneously writes data to the selected code register(s) while updating selected dac register(s) code_all 1 1 0 0 0 0 0 0 code register data[11:4] code register data[3:0] x x x x writes data to all code registers load_all 1 1 0 0 0 0 0 1 x x x x x x x x x x x x x x x x updates all dac latches with current code register data code_all load_all 1 1 0 0 0 0 1 0 code register data[11:4] code register data[3:0] x x x x simultaneously writes data to the all code registers while updating all dac registers return_all 1 1 0 0 0 0 1 1 return register data[11:4] returnregister data[3:0] x x x x writes data to all return registers no operation commands no operation 1 1 0 0 0 1 x x x x x x x x x x x x x x x x x x these commands will have no effect on the device, but will refresh the watchdog timer if safety level is set to low 1 1 0 0 1 0 x x x x x x x x x x x x x x x x x x 1 1 0 0 1 1 x x x x x x x x x x x x x x x x x x reserved commands: any commands not specifically listed above are reserved for maxim internal use only. ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 25 5. dac? returnn returnn(b[23:20] = 0111)???return ??dac?default?ret?? ????????? ?dac_address??dac? return???return_all ? ?????????? ?? coden coden (b[23:20] = 1000) ?daccode ??code???dac ldac ??????config ?dac????dac_ address??dac?code? ??code_all loadn loadn(b[23:20] = 1001)??code? ???dac?dac?? ?load ldac code?? ??????? dac_address??dac?dac? ??load_all coden_loadn coden_loadn (b[23:20] = 1011) ?dac code????dacdac?? ?load ldac code??? ?????? dac_address ? ? dac code_all_ load_all coden_load_all coden_load_all(b[23:20] = 1010)?dac code????dacdac?? ?load ldac code?? ??????? dac_address ? ? dac ? dac codedac???code_all_load_ all?????code ?code??dac_address ??dacloadload_all code_all code_all(b[23:16] = 1100_0000)?dac code?? load_all load_all(b[23:16] = 1100_0001)?code? ???dac??dacdac ? code_all_load_all code_all_load_all(b[23:16] = 1100_0010) ?daccode????dacdac? ? return_all return_all(b[23:16] = 1100_0011)?dac return?? ? ???(b[23:16] = 1100_x1xx 1100_1xxx)????? ?()???? b19 b18 b17 b16 dac selected 0 0 0 0 dac0 0 0 0 1 dac1 0 0 1 0 dac2 0 0 1 1 dac3 0 1 0 0 dac4 0 1 0 1 dac5 0 1 1 0 dac6 0 1 1 1 dac7 1 x x x all dacs ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 26 wdog wdog(b[23:20] = 0001)??? ???1ms??(1ms4095ms )wd_mask???? irq wd_mask = 1? irq ? i 2 c??????(wd) wd_mask??????? ?(?wd_reset?)??? o????????^ ????(wl[1:0]) (00) ??????? ???????????? ??(9scl?) ?? clr ldac ?????? ??????? ldacclr (01) ?wd_refresh???? ? ldac clr ???? ?????? ??ldacclr (10) ?wd_refresh???? ? ldac clr ???? ???powerrefconfig defaultreturn???? ldacclr (11) ?wd_refresh??? ?? ldac clr ???? ???powerrefconfig defaultreturn???? ldacclr??? 7. ??? * config???holdclr????config?^ 6. wdog? watchdog safety level any command refreshes wdt clr/ldac refreshes wdt sw_reset plus wd_rfrs refreshes wdt all registers accessible after wdt timeout* clr/ldac affect dac registers after wdt timeout* 00 (low) x x x x x 01 (med) x x x 10 (high) x x 11 (max) x b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 0 0 1 x x x x c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0 wdm wl1 wl0 x wdog command dont care timeout selection[11:4] timeout selection[3:0] wd_mask wdog safety level: 00: low 01: med 10: high 11: max dont care default value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 x command byte data high byte data low byte ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 27 8. ref? ref ref(b[23:20] = 0010)?dac?? ???????rf2 (b18) ????rf2?(??)???dac? ????(???)rf2 ?1??dac??????? ?(??????? )???????? ???? sw_gate_clr sw_gate_clr(b[23:0] = 0011_0000_1001_0110_ 0011_0000)??sw_gate_set? gate sw_gate_set sw_gate_set(b[23:0] = 0011_0001_1001_0110_ 0011_0000) gate ?gtb = 0 dac ( config )?? default??sw_gate_clrgate ????codedac? ?(???) wd_refresh wd_refresh (b[23:0] = 0011_0010_1001_0110_ 0011_0000)??????? ??????? ????? wd_reset wd_reset(b[23:0] = 0011_0011_1001_0110_0011_ 0000)?(?)?????? ????? irq ? ???dac?? sw_clear (b[23:0] = 0011_0100_001_0110_0011_0000) ?clb = 0 (config)??code dac??default??? sw_reset (b[23:0] = 0011_0101_1001_0110_0011_0000) ?codedac????( powerdefaultconfigwdogref?)? ?y b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 0 1 0 0 rf2 rf1 rf0 x x x x x x x x x x x x x x x x ref command reserved 0 = dac controlled 1 = always on ref mode: 00: ext 01: 2.5v 10: 2.0v 11: 4.0v dont care dont care default value 0 0 0 x x x x x x x x x x x x x x x x command byte data high byte data low byte ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 28 power power(b[23:20] = 0100)?dac???? ???dac? ?pd[1:0] (b[7:6])b[15:8]?? dac?dac??rf2?? ??(??)?? ????????? ?????(pd[1:0])? (00)dac?(?) pd 1k (01)??gnd1k ??t pd 100k (10)??gnd100k ??t pd hi-z (11)?? config config(b[23:16] = 0101)?dac?? ?????????dac ??b[7:3] b[15:8]??dac???? ??????? ?? wdog?wc[1:0] (b[7:6])? disable (wc = 00)????dac? gate (wc = 01)????dac?? default??????? ldac clr ?codedac?? ???????dac? clr (wc = 10)????codedac ???default??codedac? ?????????? ldac clr????????? hold (wc = 11)????dac? ???daccode?? ????????? ldac clr ? ???????? ? ????????? ?wdog 9. power? b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 1 0 0 0 0 0 0 7 6 5 4 3 2 1 0 pd1 pd0 x x x x x x power command reserved dac selection power mode: 00 = normal 01 = 1kw 10 = 100kw 11 = hi-z dont care default value 1 1 1 1 1 1 1 1 0 0 x x x x x x command byte data high byte data low byte ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 29 10. config? ??? dac gategtb (b5)?gate gtb = 0???(?)?? gate? ?(sw_gate_set ? sw_gate_clr )dac??default gtb = 1???dacgate??? ? ?? ldac_enbldb (b4)?ldac_enb ldb = 0dac? ldac load(?) ldb = 1dac?code??? dac ? clear_enbclb (b3)?clear_enb clb = 0??dac (?)code dac???default? clb = 1???dac b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 1 0 1 0 0 0 0 7 6 5 4 3 2 1 0 wc1 wc0 gtb ldb clb x x x config command reserved dac selection wdog config: 00: disable 01: gate 10: clr 11: hold gate_enb ldac_enb clear_enb dont care default value 1 1 1 1 1 1 1 1 0 0 0 0 0 x x x command byte data high byte data low byte ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 30 default default(b[23:20] = 0110)??dac?? ???dac?? ???????? df[2:0] (b[7:5])b[15:8]??dac ???????? ????????? sw_reset?/? ?dac??m/ z ??? m/ z?? ???(df[2:0]) m/ z (000)dac???m/ z??(?) zero (001)dac????? mid (010)dac????? full (011)dac????? return (100)dac???return?? no effect (101, 110, 111)dac????? 11. default? b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 0 1 1 0 0 0 0 0 7 6 5 4 3 2 1 0 df2 df1 df0 x x x x x default command reserved dac selection default values: 000: m/z 001: zero 010: mid 011: full 100: return 101+: no effect dont care default value 1 1 1 1 1 1 1 1 0 0 0 x x x x x command byte data high byte data low byte ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 31 ?? ?y(por) ?v dd v ddio ?dac???? dac??????? ?(200 s?) ? ?????v dd v ddio ?? ????? gnd?? ? gnd???????dac ????????????dac ???????? ???? ???max5823/max5824/max5825 gnd??????? ????? ??????? max5823/max5824/max5825??? ?(inl) inl??? ??? ??(dnl) dnl??1 lsb??dnl? 1 lsbdac????dnl? 1 lsbdac?? ? ????????? ???????? ?? ???? ?????? ?????? ? ?????dac???? ??? ? ??dac??dac? /?? ????msb????? ???????msb ??????????? ????/? ?^????? ?? /??????????? ??? ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 32 ??? out0 out1 buffer 0 channel 0 dac control logic dac channel 0 dac channel 1 power-down 1ki 100ki code load clear/ reset gate/ clear / reset code register 0 dac latch 0 8- /1 0- /1 2- bit dac0 addr0 sda scl v ddio addr1 clr ldac i 2 c serial interface control logic ref r in 100ki internal/external reference (user option) max5823 max5824 max5825 v dd gnd irq out7 buffer 7 channel 7 dac control logic dac channel 7 power-down 1ki 100ki code load clear/ reset gate/ clear / reset code register 7 dac latch 7 8- /1 0- /1 2- bit dac7 out2 dac channel 2 out3 dac channel 3 out4 dac channel 4 out5 dac channel 5 out6 dac channel 6 watchdog timer m/z por ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 33 ? dac c sda scl addr0 clr irq m/z addr1 note: unipolar operating circuit, one channel show n out gnd ldac v ddio v dd ref 100nf 100nf 4.7f r pu = 5ki r pu = 5ki r pu = 5ki max5823 max5824 max5825 dac c sda scl addr0 clr irq m/z addr1 out gnd ldac v ddio v dd ref 100nf 100nf 4.7f r pu = 5ki r pu = 5ki r pu = 5ki r1 r2 r1 = r2 max5823 max5824 max5825 note: bipolar operating circuit, one channel show n ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
maxim integrated 34 ? ??-40c+125c??? + ??(pb)/rohs??? * ??? t = ? ?? process: bicmos ?? ?????(?)? china. maximintegrated.com/packages ????+ #-?rohs???????? ?????rohs???? part temp range pin-package resolution (bit) max5823aup+* -40c to +125c 20 tssop 8 max5824aup+* -40c to +125c 20 tssop 10 max5825aaup+ -40c to +125c 20 tssop 12 max5825awp+t* -40c to +125c 20 wlp 12 max5825baup+* -40c to +125c 20 tssop 12 ? ? ?? 20 tssop u20+1 21-0066 90-0116 20 wlp w202c2+1 21-0059 ???1891 ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825
?? ? ? ? ?? 0 2/12 maximmaxim????????maxim??????????? ???(??)?????? maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-10 00 35 ? 2012 maxim integrated maxim?maxim integratedmaxim integrated products, inc.? maxim 8328 100083 ?800 810 0310 010-6211 5199 010-6211 5299 ?8?8/10/12 dac??i 2 c? max5823/max5824/max5825

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